bu_cms_history/WuProgramming

SiteMap (Historical BU CMS wiki main page)

Offset 0x10 of BAR1 is JTAG data register. It is a write/read register.

Writing a 32-bit word to the JTAG data register causes 16 TCK being sent to the selected JTAG device together with their corresponding TDI and TMS data. bits 31-16 are used as TMS data and bits 15-0 as TDI data. The MSB goes out first. TDO data are read back following each falling edge of the TCK and are read back as bits 15-0 from the JTAG data register. bits 31-16 are always read back as zeros.

Offset 0x14 of BAR1 is JTAG control register. It is a write/read register.

Bits 5-0 of the JTAG control register set the JTAG clock frequency. If bits 5-0 is set to n, TCK frequency equals 16MHz/(1 + n) Bits 10-6 of the JTAG control register select the JTAG device:

 0x1 => log3		0x3 => bc		0xa => mip4		0xb => mip5		0xc => mip6
 0x9 => log2		0x11 => log1	0x12 => mip1	0x13 => mip2	0x14 => mip3		

Bits 14-11 of the JTAG control register decide the number of JTAG cycles performed: All zeros results in N = 1, and all ones results in N = 16

 Jun.5.2002	S.X.Wu
 July 29 2002 modified to add jtag_csr bits 14 thru 11