D0/STT Electronics in the EDF

This page contains information on work being done in the EDF (Electronics Design Facility) at Boston University for the D-Zero Silicon Track Trigger project.

Maintained by E. Hazen. Updated 7/6/05.

Modules:

Workshops and Meetings

Software: Documents
Title Rev. Date Author    
"Some Thoughts on the Hit Filter" 7/26/99 W.Earle road1.ps road1.pdf
"A State Machine for Input of VTM Data to the Centroid Finder" 7/20/99 W. Earle vtm.ps vtm.pdf
"Some Thoughts on Centroid Calculation"  7/20/99 W. Earle divide.ps divide.pdf
"A Flowchart for the Centroid Finder" 9/3/99 W. Earle centroid.ps centroid.pdf
"L2STT 9Ux400mm VME Motherboard Proposal"  8/5/99 E. Hazen+ mb.ps mb.pdf
Preliminary L2STT Project Schedule  8/30/99 EH, UH L2STT.mpp L2STT.pdf
Task List for L2STT project (preliminary)       task_list.txt
"L2STT System Architecture Proposal" 8/31/99 E. Hazen+ mb_pci.ps mb_pci.pdf
Working L2STT Schedule   12/8/99 EH, UH L2STT_A.mpp  
Link Receiver Board       (see Spec Page)
9U VME Motherboard Preliminary Specification       (see Spec Page)
Link Transmitter Board Preliminary Spec       (see Spec Page)
Slides, Drawings, Sketches
 
 
Title Rev. Date Drawn by    
STC Data Paths - Preliminary 8/16/99 E. Hazen newblock.ps newblock.pdf
TFC on 9U Motherboard - Preliminary 8/15/99 E. Hazen mb_tfc.ps mb_tfc.pdf
STC Crate Option using LVDS links for Road Bus 8/25/99 E. Hazen stt_p2p.ps stt_p2p.pdf
System Architecture Upgrade 9/3/99 E. Hazen talk.pdf
Generic 9U Motherboard Block Diagram 1/14/2000 E. Hazen top_block.ps top_block.pdf
Proposal to move Level 3 logic to PMC 3/28/2000 E. Hazen   mb_mods.pdf

Links