DCCv5 JTAG Chain

1.	U4	EP1K30F256	PCI 3
2.	U18	XC9572XL-TQ100	Flash memory control
3.	U1	XC2V2000-BG525	Main DCC logic
4.	U3	EP1K30F256	PCI 2
5.	U2	EP1K30F256	PCI 1

Note that when the cable is disconnected the chain is in principle accessible via the local control interface on the motherboard; this feature has never been used or tested.

Programming Procedure

Summary

• Program CPLD on logic board using Xilinx Impact
• Program PCI1, PCI2, PCI3 with temporary firmware using Altera MAX+plus II
• Program flash sectors for PCI1, PCI2, PCI3, Xilinx with latest firmware

Required Stuff

• Hardware
  • VME crate with interface to PC running standard HCAL DAQ package (release 3_5_2 or newer) for DCCprogrammer.exe tool.
  • A PC running Windows (2000 or XP) which has a parallel (LPT) port located within 2m of VME crate (laptop is OK).
  • Altera Byte Blaster MV programming cable. The schematic is shown, so in an emergency you could make one.
  • DB-25 extension cable for byte blaster if needed to reach crate.
  • Adapter cable to switch pinout for Xilinx operations (pinout described here). This is a DB-25 cable which goes between a PC parallel port and the Altera byte blaster. It should be no longer than about 2m.
• Windows Software
  • Altera Max+plus II programmer. Free download from Altera website.
    Emergency/archive copy: asap2_1023.exe
  • Xilinx IMPACT programming tool. Available as part of ISE Webpack free download from Xilinx website.
    Emergency/archive copy: WebPACK_82i_ProgTools.exe
• Required Files
  • Download DCCv4_initial_firmware.zip and unzip in an empty directory.
  • Download the latest versions of PCI1, PCI2, PCI3 and DCC logic firmware from the CERN repository (these will be files named something like this: pci1v#.hex, dccv2xxx.mcs.)

Programming CPLD on logic board with Xilinx Impact

• Edit the file dccv4.cdf so that the path in each "File" line points to the directory where you unzipped the archive above.
• Connect the Altera Byte Blaster cable to the DCCv5. Plug the 10 pin cable into P1 on the top edge of the DCCv5 logic board (pin 1 towards VME backplane). Connect the Byte Blaster to the PC through the Xilinx pinout-changing adapter (see above)
• Start Xilinx Impact 8.2 (other versions should work too). Load the projct file dccv4.cdf
• You should see a graphic of a JTAG chain with 5 chips.
    Select the xc9579xl (2nd from left)
    Select menu Operations->Get Device ID
    ...you should get a message 'Read IDcode succeeded' or similar.
      (if not, there's a hardware problem)
    Select menu Operations->Program and OK.
    ...you shoudl get a message 'Program succeeded' or similar.
• (you may need to power-cycle the crate at this point...)

Programming PCI 1, 2, 3 with MAX+plus II

• Edit the file dccv4_chain.jcf so that the DEVICE_1, DEVICE_4 and DEVICE_5 lines have the correct path to the .sof files.
• Remove the Xilinx adapter cable and connect the Byte Blaster direct to the PC (use a 1:1 extension cable if needed).
• Start MAX+plus II program.
  • Select menu MAX+plus II->Programmer
  • Select menu JTAG->Restore jcf..
    Navigate to the file dccv4.jcf and OK.
  • Select menu JTAG->Multi-Device JTAG Chain Setup
    Select Detect JTAG Chain Info
      Should see "JTAG Chain Information Confirmed by Hardware Check"
      (if not, there is a hardware problem somewhere...)
    Select OK (twice) and Configure
      This should configure the PCI3 FPGA.
• Important: do not turn the power off before the next step.

Program Flash memory using DCCprogrammer.exe