Changes between Version 1 and Version 2 of ZyboNotes


Ignore:
Timestamp:
Oct 16, 2017, 10:20:30 AM (5 years ago)
Author:
Eric Hazen
Comment:

--

Legend:

Unmodified
Added
Removed
Modified
  • ZyboNotes

    v1 v2  
     1UP: QuadPulser
     2
    13
    24Note that this is the original Zybo, not the newer Z7-10 or Z7-20 boards.
     
    57* [http://store.digilentinc.com/zybo-zynq-7000-arm-fpga-soc-trainer-board/ Digilent Page] for Zybo
    68* [https://reference.digilentinc.com/reference/programmable-logic/zybo/reference-manual Reference Manual]
     9
     10ADC board pin to adapter header pin mapping:
     11
     12|| '''ADC Net''' || '''FMC Pair''' || '''Adapter''' ||
     13|| CLK_OUT       || H4/H5          || P1-1,2        ||
     14|| DATA_OUT      || H7/H8          || P1-3,4        ||
     15|| DATA_IN       || H10/H11        || P2-1,2        ||
     16|| FMCCLK2       || G30/G31        || P2-3,4        ||
     17|| FMCCLK1       || C2/C3          || P3-1,2        ||
     18|| PWR_ENA       || C26            || P3-3          ||
    719
    820Chip used is Xilinx Zynq-7000 (XC7Z010-1CLG400C).  Pinout details for PMOD I/O below.