This page describes an electronics module which will provide a computer interface for power management, clock, controls and readout of the G-2 traceback tracker.

2013 Prototype

The prototype is built on a ​Diglent Nexys 3 A simple interface communicates with the TDC board using the C5 protocol described in the paper linked below.

The TRM logic may be logically partitioned into 3 separate blocks described below.

• TRM_C5_Encoding
• TRM_8b10_Decoding
• TRM_Interface

Clocks required, generated from 100MHz oscillator using 2 DCMs:

• 40MHz for C5 encoder
• 125MHz for 8b10b recovery (25MHz * N (where n=5/6/7 or so)

A temporary USB computer interface is provided.

• ​Google Document

Nexys 3 programming on Linux:

• Download Adept runtime and utilities from digilent web page
  • Uncompress both
  • Find "ftdi_drivers" folder and run the install.sh script using sudo
  • Go up to the runtime directory and run install.sh script using sudo
  • Go to the utilities directory and run install.sh script using sudo
  • (just take the defaults for all the questions)

Programming incantation:

  djtgcfg -d Nexys3 -i 0 prog -f ~/ISE/G-2/CDRTest/top.bit

Resources

• ​UART6_User_Guide_30Sept12.pdf
• ​KCPSM6_Release5_30Sept12.zip
• ​Blind Oversampling Data Recovery
• ​OpenCores 8b10b Encoder/Decoder
• ​Xilinx XAPP1112
• ​CACTUS
• ​g-2TDC.pdf
• ​C5_IEEE.doc

proposed for use in TDC clock/readout

• ​Talk on Programmable Logic