This page describes the proposed Rev 2 version of the CMS TTT. This module essentially provides encoding and decoding of the fibre optic protocol used by the LHC TTC system.

The proposed Rev 2 version will have the following enhancements over the original:

• Careful clock distribution to FPGA
• More (4?) fibre links
• Gigabit Ethernet (SFP); IPBus v2
• Substantially larger FPGA to support above requirements
• Eliminate or move to non-front-panel connector the TTS (RJ-45 I/O)

I/O should be as follows:

• 4X SFP for TTC signalling
• 1X SFP for Gigabit Ethernet
• Clock in
• Clock out
• 3-4 NIM logic inputs (BC0, L1A, spares)
• 3-4 NIM logic outputs (BC0, L1A, spares)

Reference

• TTTT Users Manual

• CMS_TTT-TTS_TTC_Tester -- V1 board documentation
• TTCci schematic: ​EDA-00650-V6_sch.pdf
• TTCex schematic: ​P1 ​P2 ​P3

Some explanation of the CERN modules: The ​TTCci is a module developed for CMS which provides much of the same functionality we need, but is output-only. It has both A/B electrical outputs which would drive a TTCex module, but also a high-power laser which can drive 32 loads through a passive optical splitter.

The TTCex receives the A/B optical signals plus clock and has 10 high-power laser outputs.

The high-power laser output may be a problem. The TTCci used a PT5343 which is obsolete. See ​Slide 8 for some more info. The chosen OCP STX03 seems also to be obsolete.