Changes between Version 6 and Version 7 of TDC v1 ECO List


Ignore:
Timestamp:
Dec 11, 2013, 11:50:06 AM (9 years ago)
Author:
Eric Hazen
Comment:

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  • TDC v1 ECO List

    v6 v7  
    99 * N16 & N15
    1010 * K16 & K15
     11
     12== Future Changes (V2 PCB)
     13
     14* Power FPGA bank 8 on 2.5V
     15* Move TSTP, TSTN to Bank 8 (LVDS)
     16* Review design for any other pin conflicts (i.e. between voltage ramp inputs and test connector)