This page describes a 2017 project to develop a second-generation D-DOSI system.

See also and

Conceptual Design

Production History Review (2/22)

  • 8/9/19: Newgrange layout for Rev 2 GPIO, ADC, DDS bill
  • 9/30/19: Cirexx fab (DDS, GPIO, ADC) bill

Tag the SVN as Rev 2.0:

 svn copy \ \
  -m "Tagging at 2.0 before re-spin in 2022"

Looking at SVN log and email, we find:

Carrier Rev 2 deliverables received 11/6/18 from Maggie at Newgrange.
These are now in
along with the zipfiles

r288 | Mike | 2019-08-15 16:39:05 -0400 (Thu, 15 Aug 2019) | 1 line
Changed paths:
   M /hardware/trunk/ADC/ADC-BOARD.DSN
   M /hardware/trunk/ADC/D-DOSI-ADC.brd
   A /hardware/trunk/ADC/
   A /hardware/trunk/ADC/

Final board and schematic files with FAB and DES packages
r287 | Mike | 2019-08-15 16:25:06 -0400 (Thu, 15 Aug 2019) | 1 line
Changed paths:
   A /hardware/trunk/GPIO/D-DOSI
   M /hardware/trunk/GPIO/D-DOSI-GPIO.brd
   A /hardware/trunk/GPIO/

Final board and schematic with FAB and DES packages
r286 | Mike | 2019-08-15 16:23:18 -0400 (Thu, 15 Aug 2019) | 1 line
Changed paths:
   M /hardware/trunk/DDS/D-DOSI-DDS.brd
   A /hardware/trunk/DDS/
   A /hardware/trunk/DDS/
   M /hardware/trunk/DDS/DDS-BOARD.DSN

Final brd and dsn + deliverables
r285 | Mike | 2019-08-14 13:19:22 -0400 (Wed, 14 Aug 2019) | 1 line
Changed paths:
   M /hardware/trunk/DDS/D-DOSI-DDS.brd
   M /hardware/trunk/DDS/DDS-BOARD.DSN

Rev 2 board changes and schematic changes (added foots to U201,202; added NC property U202.1; U1 ground change\
d from AGND to GND)

Rackmount version Rev B

ECO/Notes on Rev 2.0:

  • DDS board: C71 is wrong footprint, should be 1206. Need to scrape some soldermask to install the correct 1206 part.
  • DDS board: C8, C102, C201, C202 have value "CAP" should be 0.1uF
  • DDS board: Increase trace width on 1.8V between two isolated areas
  • Carrier: Oscillators were installed 90 deg rotated. Fix/clarify silkscreen?

These are as built schematics for Rev B (aka Rev 2.0, dated Aug 2019). Received from assembly 11/8/19.

(the Carrier/motherboard has not changed for Rev B)

Rackmount version Rev A

Current Prototype Reference Materials

2018-10-30 Check for mfg

2018-10-08 Edits

  • Created SVN tag 'RevA' from trunk, editing in trunk.

ECO list below including Dan's from 8/13/18

Editing in ...hardware/CARRIER/DSN

  • Slots 2, 3, 4 for DDS need LA02 and LA04 wired while on carrier LA02 and LA03 are wired (done)
  • Add level shifters on SPI for the Si5340 from 2.5V to 1.8V (done, added U101 and U102)
    • Note default Si5340 is 1.8V (can set to 3.3V using SW bit). PicoZed bank 13 is 2.5V.
  • Level shifters on FTDI serial are reversed! (done, ugh)

2018-08-13 Requests

  • On sheet 10 of Carrier schematic (all below done 10/8/18)
    • Connect CKIN_P0 to BANK13_LVDS_1_P
    • Connect CKIN_N0 to BANK13_LVDS_1_N
    • Connect CLK_P2 to BANK13_LVDS_0_P
    • Connect CLK_N2 to BANK13_LVDS_0_N
    • Connect CKIN_P1 to JX2_LVDS_12_P
    • Connect CKIN_N1 to JX2_LVDS_12_P
    • Connect CLK_P3 to BANK13_LVDS_8_P
    • Connect CLK_N3 to BANK13_LVDS_8_N
  • Please add "FPGA DONE LED" circuit from PicoZed FMC carrier board Page "07 - Switches, LEDs" pdf

2/10/18 To-Do

ADC board Layout check

  • Fab Drawing (stack-up):
    • change L1-L2 and L3-L4 dielectric to 5 mils
    • change L2-L3 to omit dielectric thickness spec so "DIELECTRIC - FR-4"

DDS board layout check

  • Fab Drawing (stack-up):
    • change L1-L2 and L5-L6 dielectric to 5 mils



In meeting on 7/11/17 we discussed the development of a new version of the dDOSI electronics. The main differences from the existing hardware would be:

  • Compact rack-mountable design (target 1U enclosure height)
  • Variable gain and/or increased bit depth on ADC
  • Errors in prototype taken care of for easier manufacture
  • Update from MicroZED to PicoZED system-on-board


Candidate ADC is now ADS42LB69 dual-channel 16-bit 250MSPS converter

The PGA870 looks like a good candidate programmable-gain amplifier.


Meeting with Steven Larochelle, (Rachita Chaudhury), Thomas Floros, Darren and Raeef.


  • Power supply connector is 6-pin 2x3 mini-fit Jr (DigiKey? WM11874-ND)
  • SMA connectors will all be vertical on the PCBs
  • Change GPIO design to include:
    • 4 SMA inputs
    • 4 SMA outputs
    • Header with 8 out + 4 in.
    • Change layout for vertical SMA connectors
Last modified 17 months ago Last modified on Oct 7, 2022, 12:47:24 PM