wiki:QuadPulserEarlyThoughts

Version 1 (modified by Eric Hazen, 6 years ago) (diff)

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Some Thoughts

32 channels of 1GSPS is probably too expensive. There is a 12-bit part from TI (ADC12D500) which is a two-channel 500MSPS part which can interleave to get 1GSPS. They're about $280 each.

Bits MSPS Cost/ch PN/Notes
12 1000 $280 TI ADC12D500 (two 500MSPS channels interleaved)
12 500 $168 Intersil KAD5512P
12 250 $44 ADS4229 (two 250MSPS)
12 125 $21 LTC 2145 (2 ch)
12 105 $23 ADS6424 (4 ch, 12 bit Serial LVDS)
12 105 $22 AD9633 (4 ch, 12 bit serial LVDS)
12 105 $24 ADC12DS105 (2 ch, 12 bit Serial LVDS)

Observations about signals:

  • "Normal" case is three short pulses (few uS long at most) at 0, 50us and around 1ms
  • Stray discharges are typically quite short (few 100ns), amplitude similar to normal pulses (<1V)
  • Sparks are characterized by large amplitude and significant width. There can be a train of spark pulses spread out over substantial fractions of the 1ms pulse period.
  • Beam timing has ~ 10ms between pulses where the should be no signals

One possible proposal:

  • Digitize 32 channels at 125 MSPS (single gain scale), full scale +/-5 or +/-10V
  • Artix XC7A35T has 1.8Mb block RAM. These are around $35 each. Propose to use one per Quad pulser (total of 4 in system). This could store ~ 150us of waveform per channel on all channels, seems fine.
  • Transferring entire 1.8Mb in 10ms elsewhere requires a 180Mbps link (only)
  • There are 4 MGT transceivers on the PicoZed 7015 or 7030.
  • Store zero-suppressed waveforms with length limit, when limit exceeded record just width or number of zero-crossings or other info to characterize the pulse. Possibly the absolute-value envelope with low resolution but calculated in the FPGA
  • Readout via MGT point-to-point to PicoZed, thence over Ethernet
  • Worst case bandwidth: 1.8Mb * 4 pulsers * 12Hz = 86Mbps (10 MBytes/sec or 2.7 MHz 32-bit words)