Changes between Version 4 and Version 5 of PostReviewIssues
- Timestamp:
- Oct 29, 2015, 1:08:03 PM (7 years ago)
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PostReviewIssues
v4 v5 8 8 * Push forward production schedule as much as possible to get all the boards we can out before Christmas (not in this document but in answers to charge questions) 9 9 * TDC be modified to include cable connectors attached to spare FPGA I/O pins through suitable drivers and receivers to allow the system to be debugged with an oscilloscope during operation. 10 * Good idea. Tentative plan is to add one 10-pin (2x5) 2mm pitch header per TDC with four LVDS pairs and two GND 10 11 * Modify a module for test purposes to allow the use of at least one ASDQ BLR (analog) output. The analog signal will quickly reveal subtle problems that may exist with the configuration or biasing of the ASDQs. [http://ohm.bu.edu/trac/edf/attachment/wiki/PostReviewIssues/SeaQuest%20-%20ASDQ_v4_schematic-6.pdf Sea Quest ASDQ Schematic ] [http://ohm.bu.edu/trac/edf/attachment/wiki/PostReviewIssues/SeaQuest%20-%20Analogue%20Signal%20Cable.JPG Sea Quest Cable Photo ] 12 * Eric: talk to Sten H about best way to do this 13 * James: see if there is room to get a small twisted pair out 11 14 * Interface between the straw and the electronics is established through sockets in a printed circuit board. Due to the rigidity of this connection there is a potential risk to break wires when installing and/or removing this board. Unless testing establishes that this is not a concern, an alternative way of connection is desirable like in the form of conductive elastomer that provides a flexible soft connection or some kind of spring loaded connection that can be engaged/released mechanically all at once for all connections. 15 * Wait for further Liverpool testing before doing anything drastic 12 16 13 17 [[BR]] … … 15 19 * Understand what's going on with widths of pulses - look into setting drain current or QTHR to different value - we might like to make this short to minimise dead time. 16 20 * Test performance with different power rail settings (+/- ~2.8 V). 21 * James is going to look into this 17 22 18 23 == Outstanding issues after the test beam ==