Navigate to: Linear_Collider

Link Test Gadget

We propose to build a gadget consisting of a Xilinx Spartan-3E evaluation board with a small adapter connected to simulate one or both ends of the front-end link. Here are some notes on this gadget:

• Adapter: ​Schematic ​PCB layout
• Xilinx ​Spartan-3E Eval Board ​User Guide
• FPGA_Design_Notes

Digital Isolators

The front-end link as specified requires one signal in each direction (Tx/Rx?) plus an additional asynchronous Tx signal for test pulse timing. So, an isolator with 1/2 channels is required.

Isolators Options:

• ​ADuM340x
• ​Si843x
• ​i171x
• ​ISO721M

LVDS Tx/Rx?:

• ​LVDS050

[[image:FELink]]