Changes between Initial Version and Version 1 of EmbeddedForthCPU


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Timestamp:
Nov 8, 2013, 10:17:54 AM (6 years ago)
Author:
hazen
Comment:

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  • EmbeddedForthCPU

    v1 v1  
     1Investigating [http://excamera.com/sphinx/fpga-j1.html J1 Forth CPU]
     2
     3'''2011-10-06, hazen''
     4
     5Downloaded verilog and put it in a Xilinx project for Spartan-6.  Got it to compile, after
     6figuring out that the S6 BRAMs require the SSRA and SSRB pins to be connected.
     7