Changes between Initial Version and Version 1 of CapLevelSensor


Ignore:
Timestamp:
Nov 8, 2013, 10:17:53 AM (9 years ago)
Author:
Eric Hazen
Comment:

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  • CapLevelSensor

    v1 v1  
     1Capacitance Level Sensor
     2
     3= Prototype 2 =
     4
     5This board was designed by Chris Woodall in 2010/2011 and has an on-board AVR microcontroller and fiber optic interface.
     6
     7''''PCB Documentation'''
     8
     9* Schematic: [http://ohm.bu.edu/~cwoodall/nEDM/nEDM_cap_level_sensor/nEDM_cap_level_sensor_revA.sch SCH]
     10[http://ohm.bu.edu/~hazen/nEDM/nEDM_cap_level_sensor_RevA_sch.pdf PDF]
     11* PCB Layout: [http://ohm.bu.edu/~cwoodall/nEDM/nEDM_cap_level_sensor/nEDM_cap_level_sensor_revA.pcb PCB]
     12[http://ohm.bu.edu/~hazen/nEDM/nEDM_cap_level_sensor_RevA_assembly.pdf PDF]
     13* Parts List: [http://ohm.bu.edu/~cwoodall/nEDM/nEDM_cap_level_sensor/nEDM_cap_level_sensor_revA.bom BOM]
     14
     15''''Design Notes'''
     16
     17The PCB consists of an AD7746 capacitance digitizer chip, an ATMega168 microcontroller, and a fiber-optic serial link.  There is also a site to connect an FTDI USB/serial breakout board.  The programming connector (J3) should be plug-compatible with the tuxgraphics programmer.  Here is a suggested sequence for commissioning of the board after assembly:
     18
     19* Apply 5V power (careful with polarity!) via J5.
     20* Download AVR with a simple program to blink LEDs
     21* Install jumpers in the bottom two positions of JP1 and JP2, and install the Sparkfun FTDI basic USB breakout board at J4
     22* Download AVR with a program to to test the serial/USB I/O and verify that it works
     23* Read the AD7746 documentation and Conor''s notes below, and port the capacitance measuring code to the AVR.  This involves understanding how to use the I2C bus (Conor can help with this).
     24
     25= Prototype 1 =
     26
     27This is a board designed to be connected to a computer or FPGA evaluation board built in 2010 by Paul and Conor.  It was tested successfully using a cable to a PC parallel port and the C code below by Conor.  Ask him for details!
     28
     29* [http://ohm.bu.edu/~pbohn/nEDM/capsensor/Design_Files/ Schematic]
     30 * Bill Of Materials [https://spreadsheets.google.com/ccc?key=tXgwBfEnz-mabwTJGI2D6Ng (Google Spreadsheet)] [http://spreadsheets.google.com/pub?key=tXgwBfEnz-mabwTJGI2D6Ng&output=csv (csv)]
     31* [http://ohm.bu.edu/~pbohn/nEDM/capsensor/Design_Files/ PCB Layout]
     32
     33'''' Design Reference '''
     34
     35* [http://www.analog.com/en/analog-to-digital-converters/capacitance-to-digital-converters/ad7746/products/product.html AD7746:  24-bit, 2 Channel Capacitance to Digital Converter]
     36* [http://www.analog.com/en/verifiedcircuits/CN0129/vc.html Extending the Capacitive Input Range of the AD7745/AD7746 Capacitance-to-Digital Converter  (CN0129) ]
     37* [https://nedm.bu.edu/twiki/bin/view/NEDM/CapacitanceIC Notes by Steven Clayton]
     38
     39''''Software'''
     40* [http://ohm.bu.edu/~cdubois/Minor%20programs/par_rtlib.tar.gz Linux C program that measures capacitances]
     41* [http://ohm.bu.edu/cgi-bin/edf/Neutron_Electric_Dipole_Moment_(nEDM)/CapLevelSensor/Interaction_Sequence Program Data Readout Procedure Description]
     42
     43'''' Testing '''
     44
     45This device can be easily tested using the parallel port on a PC with appropriate software.  The following cable can be made, with a DB-25 male (plug) on one end and a 10 pin ribbon cable on the other end (mates with J1 -- 8 pins only).
     46
     47|| ''''DB-25 Pin''' || '''Parallel Port Function''' || '''J1 Pin''' || '''I2C Function ''' ||
     48|| 8 || Data6 || 3 || SCL ||
     49|| 9 || Data7 || 5 || SDA (Wr) ||
     50|| 11 || Busy || 7 || SDA (Rd) ||
     51|| 18-25 || GND || 2,4,6,8 || GND ||
     52
     53Note that the parallel cable used in our experiments was overly long such that it had a non-trivial crosstalk. A 5100 ohm series resistor was added into the connection between pin 11 of the parallel port and pin 7 of the J1 connection to reduce the slew rate.
     54
     55* [http://www.beyondlogic.org/spp/parallel.htm Interfacing the Standard Parallel Port]
     56* [http://ohm.bu.edu/~hazen/nEDM/par_rtlib.zip par_rtlib.zip]
     57
     58