Version 4 (modified by 5 years ago) (diff) | ,
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2019-05-15
Issues:
- 220uF caps should get smaller (physically, too tall)
- Remember to populate R50 with CERN IPMC value.
- We should add a pull-down to U15 pin 1 for when we have no IPMC (added on board 1)
We should add a pull-up to ETH_SW_RESET_N(Has on-board pull-up, so we are OK)- Traces under mounting splice plate holes
Notes:
- No IPMC/Switch/Zynq => 48V@ ~60mA
- 3.3V and 12V => ~120mA
- Powering up 3.3/1.8V regs gives ~200mA